1. Field of the Invention
This invention relates to integrated electronic circuit technology. More particularly, this invention relates to electrically programmable antifuse elements.
2. The Prior Art
Integrated electronic circuits are usually fabricated with all internal connections set during the manufacturing process. However, because of high development costs and high manufacturing tooling costs of such circuits, it is advantageous if such circuits can be configured or programmed by the user for a specific application. Such circuits are called programmable circuits and are programmed by either selectively breaking or creating a, series of programmable links. Programmable links are electrical interconnects which are broken or created at selected electronic nodes in the circuit by the user after the integrated circuit device has been fabricated and packaged. Such programming is undertaken in order to activate or deactivate, respectively, the selected electronic nodes such that the PROM can be programmed to perform a desired function.
Fusible links have been used extensively in PROM devices and are well known. A PROM device usually consists of an X-Y matrix or lattice of conductors or semiconductors. At each cross-over point of the lattice, a conducting link connects a transistor or other electronic node to the lattice network. The PROM is programmed by providing a high programming current to predesignated fusible links which connect to selected nodes. Links are then blown out to create an open circuit. The combination of blown and unblown fusible links represents a digital bit pattern of ones and zeros signifying data which the user wishes to store in the PROM.
Fusible link PROM systems present certain disadvantages. For example, relatively high programming voltages and high current levels are needed during programming to guarantee the complete blowing out of the fusible links. Since the fusible link is usually conductive, excessive power dissipation may be necessary in order to blow out the link and thus program the device. Also, the shape and size of the fusible links must be very precisely controlled so that the link will function effectively as a conductor if it is not blown out. Conversely, the fusible link must be a completely open circuit if it is blown. Therefore, very critical photolithographic steps and controlled etched techniques are required during the manufacturing of fusible link PROMs. Such precise dimensional tolerances are difficult and expensive to attain. In addition, a large gap must be blown in the fusible link in order to prevent it from later closing by reason of the accumulation of conducting material near the blown gap. Accordingly, fusible link memory cells must be disadvantageously large in order to accommodate the fusible link and an associated selection transistor which develops the high current needed to blow the link. Fusible links therefore take up an excessively large amount of valuable space on a semiconductor chip and have high manufacturing and material costs.
Another type of programmable link, called an antifuse link, has been developed for use in integrated circuit applications in order to overcome the foregoing disadvantages of fusible links. Instead of a programming mechanism for causing an open circuit as is the case with the fusible link, the programming mechanism for an antifuse creates a short circuit or relatively low resistance link. Antifuse links consist typically of two conductor and/or semiconductor elements having some kind of a dielectric or insulating material between them. During programming, the dielectric at selected points between the conductive elements is broken down by a current developed from a predetermined programming voltage applied to the conductive elements of selected links to thereby electrically connect the conducting or semiconducting elements.
Various materials have been suggested for both the conducting elements and the dielectric or insulating layer. Some of these suggested dielectric materials require a relatively high current and voltage during programming and therefore demand complex manufacturing techniques. Such antifuse elements have low reliability during programming because it is difficult to control the reproducability of the conductive state due to the nature of the crystalline microstructures of the dielectric layer.
In addition, the programming process results in a link having a finite resistance on the order of several hundred to several thousand ohms. This characteristic of known antifuse elements renders them relatively unsuitable for use in high speed circuits. Such increased resistance results in high impedance and unacceptably high power consumption when several thousand circuits are switching simultaneously.
Prior art antifuse devices are typically one of two major types depending upon the dielectric or insulating material which comprises the interlayer disposed between the two conductive elements. Dielectric antifuses typically employ silicon dioxide or a multilayer sandwich of silicon dioxide and silicon nitride. Antifuse elements employing a dielectric interlayer are disadvantageous because they require programming voltages on the order of 16 to 20 volts in order to be programmed and still remain reliable at normal operating voltages of 5 volts. In order to program dielectric type antifuses so that they maintain reliable operation at 5 volts, the dielectric thickness must be on the order of 100 .ANG.. Such a thin interlayer has the disadvantage of producing a relatively high capacitance. This can severely limit device operating speed because numerous unblown antifuses on a single line act as capacitors linked in parallel. The sum of the individual capacitances of the unblown antifuses therefore may be quite high and may drastically slow down data signals.
Another possible drawback of known dielectric antifuses containing silicon dioxide or a multilayer sandwich of silicon dioxide and silicon nitride is that a high temperature low pressure chemical vapor deposition (LPCVD) process must be used in order to deposit the thin oxide layer, or nitride layer with good uniformity and film controllability. However, the high temperature LPCVD process may have the disadvantage of inducing the formation of hillocks on the first metallic layer. The hillock formations may extend through the 100 .ANG. thin oxide and cause multiple short circuits between the first and second metallic layers, so it is advisable to avoid hillocks between metal layers.
The second type of prior art antifuse typically comprises an interlayer of amorphous silicon sandwiched between first and second layers of metal. The antifuses incorporating an amorphous silicon interlayer provide a thickness on the order of twenty times greater for the same programming voltage as compared to the dielectric antifuses with the 100 .ANG. or less thin oxide or thin nitride layers. However, amorphous silicon antifuses have the disadvantage of extremely high leakage currents. The high leakage current inherent in the use of amorphous silicon can create a serious problem in terms of the controllability of the programming voltage. High leakage current can also cause severe storage time degradation in MOS devices. Thus, prior art amorphous silicon antifuses have serious programmability problems. In addition, an amorphous silicon antifuse may be prone to crack propagation and continuity failure after long hours of operation.
In order to overcome the foregoing disadvantages of prior art antifuses wherein the interlayer consists exclusively either of a dielectric or an amorphous silicon material, it is an object of the present invention to provide an electrically programmable low impedance antifuse which may be programmed with programming voltages of 18 volts or less in order to maintain reliable low impedance operation at standard MOS device operating voltage of 5 volts.
It is, yet a further object of the present invention to provide a antifuse element having a well-controlled programming voltage which will provide an improved degree of uniformity in the formation of the ohmic contact between the conducting elements and will advantageously require a lower programming voltage.
It is another object of the present invention to provide a plurality of electrically programmable antifuse elements with substantially reduced parasitic capacitance for use in a PROM device which will result in faster speed and greatly reduced power consumption when several thousand gates are switching simultaneously.
It is yet another object of the present invention to provide an electrically programmable antifuse element which substantially eliminates leakage currents, crack propagation and continuity failure inherent in a prior art amorphous silicon antifuse elements and thereby greatly improve the memory storage reliability and useful lifetime of a PROM device incorporating a plurality of antifuse elements. Other and further advantages of the present invention will appear hereinafter.